asteralabs

Physical Design/CAD Engineer

Apply Now

At a Glance

Location
San Jose, California, United States
Experience
2–10 years
Posted
2026-03-31T14:28:20-04:00

Key Requirements

Required Skills

Python

Domain Knowledge

  • Engineering

Requirements

2-10 years of experience in PnR and sign-off for complex SoCs in Server, Storage, or Networking applications.

Expertise in PnR, Extraction, Timing closure, EM-IR, Formality and DRC/LVS at both block and full-chip level.

Strong knowledge of synthesis, place-and-route, extraction, and equivalence checking flows in advanced nodes (7nm or below).

Proficiency with Cadence and/or Synopsys physical design/STA toolchains.

Strong scripting ability (Tcl, Python, Perl).

Knowledge of agentic AI solutions is a plus.

Responsibilities

As Physical Design CAD Engineer you will support and build flows for world class EDA tools.

Drive various Physical Design flow related activities, ensuring robust signoff across complex SoCs or sub-systems.

Architect and recommend flow improvements and enhance existing methodology for high performance design.

Good understanding of flow development related to backend tools like Synthesis/PnR/Extraction/DRC/LVS etc.

Work with cross function teams to define requirements and specifications to achieve best PPA

Opportunity to own a small block partition and closure (PnR, STA, DRC and LVS etc) based on interest and capacity