CPU Architect, Load-Store

Strong understanding of computer architecture fundamentals, including memory hierarchy, cache coherence, and data prefetching

Familiarity with performance modeling and simulation tools (e.g., Gem5, SimpleScalar, or similar).

Basic knowledge of hardware description languages (e.g., Verilog, VHDL) and system-level programming (C, C++).

Hands-on experience with performance profiling tools and benchmarking methodologies.

Exposure to parallel processing architectures and multi-core systems.

export-controlled technology.

Drive the architecture, micro-architecture, design and optimization of the CPU load-store unit for Tenstorrent’s high-performance out-of-order RISCV CPUs

Propose new implementations to optimize load-store PPA

Perform simulations, modeling, and performance analysis of advanced CPU features and state-of-the-art data prefetchers

Collaborate with hardware and software teams to optimize memory access patterns and system performance.

Stay up to date with industry trends and emerging technologies in CPU architecture and the memory subsystem

Support documentation and presentation of architectural decisions, trade-offs, and findings.