Principal Engineer, SOC Integration

Hands on knowledge & experience in ASIC design flow from design to tape out.

Experience in the commercial IPs such as UCIe, CPU, Ethernet, and DDR interfaces.

Experience in SoC level synthesis, timing analysis, lint check, CDC checks.

Good knowledge and experience in AMBA bus fabric, ARM CPU cores and ARM Co-sight debug features.

An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.

You’ll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.

The DRAM Development Lab (DDL) is part of Samsung’s Memory Business Unit, the industry's technology and volume leader in DRAM, HBM and NAND Flash.  DDL’s vision is to solve key problems of Cloud & Data center by developing the new technology for memory and storage.

The SOC team within DDL focuses on the development of silicon solutions.

We are an integral part of Samsung’s strong R&D focus & lab innovation engine.

We work closely with development teams to bring feature innovation to product roadmaps.

Come join the team as a Principal Engineer, SOC Integration that is creating new computing system architectures needed to support emerging machine learning applications, data analytics and edge computing.

You’ll focus on enhancement of memory and storage capability by developing prototype and production controllers.