asteralabs
System Validation Engineer (Various Levels)
At a Glance
- Location
- San Jose, California, United States
- Experience
- 12+ years
- Compensation
- salary range for this role is $125,000 - $290,000 CAD depending on experience,
- Posted
- 2026-03-11T16:45:21-04:00
Key Requirements
Required Skills
Domain Knowledge
- Automation
- Embedded Systems
- Engineering
- Regulatory
Requirements
2-12+ years of experience supporting or developing complex SoC or silicon products for server, storage, or networking domains (level dependent)
Working understanding of x86 and ARM architectures and UEFI/Linux boot sequences
Solid grasp of high-speed signaling principles
Hands-on experience with high-speed protocols such as PCIe, CXL, NVMe, or Ethernet
Proven experience in silicon and system bring-up, validation, and debug in lab and customer environments
Strong Python automation skills for bench control, test orchestration, data analysis, and reporting
Responsibilities
Astera Labs is seeking
System Validation Engineers across multiple levels
to lead post‑silicon bring‑up and system validation for high‑performance PCIe and CXL memory expansion products used in AI and cloud data centers.
You will design and execute validation plans, automate data‑centric test flows, drive root‑cause investigations across silicon, firmware, hardware, and systems, and work directly with customers to validate real world performance and interoperability.
This role is based in our Vancouver office, which is a strategic growth hub for Astera Labs' validation team.
This is a unique chance to help shape the team's culture, processes, and technical direction as we scale our validation capabilities to meet surging demand for AI infrastructure connectivity.