RenesasElectronics
Director, Package Design Engineering
At a Glance
- Location
- San Jose, California, United States
- Employment
- Full-time
- Posted
- 2026-08-13T20:12:37.256Z
Key Requirements
Domain Knowledge
- Engineering
Benefits & Perks
with a competitive benefits package alongside their salary. More informatio
Requirements
15 to 20 years of relevant experience in package development emphasizing power SiP/module, wafer level & flip-chip packaging
Strong understanding of power SiP/modules, wafer level/flip-chip packaging methods, assembly process knowledge, qualification methods, SPC and statistical analysis software
Knowledge of wire-bonding & multi-chip module technologies a plus.
Compensation & Benefits
The expected annual pay range for this position is $230,000-260,000. This position is also eligible for bonus opportunities. Please note that final offer amount will be dependent on geographic location, applicable experience, and skillset of the candidate.
Renesas is an embedded semiconductor solution provider driven by its Purpose,
To Make Our Lives Easier
. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Responsibilities
Package Technology Development/NPI, R&D, Global OSAT management for new Package Development/Product qualification, Technology Roadmap definition, R&D budget management & customer adoption programs.
Focus on design and development of package and interconnect methods for Renesas’s AI/Datacenter Infrastructure Power packaging needs especially Smart Power Stages, Vertical Power Stages, Power Modules & Discrete FET packages.
SiC & GaN) development along with DBC, AMB substrates and advanced interconnect technologies.
Knowledge of wafer level, flip-chip, multi-chip module and power devices will be a plus.
Benchmark, select and qualify suitable materials, processes and assembly subcontractors (OSAT) or contract manufacturers (CM).
Work with OSAT/CM to develop, run DOE to optimize processes and establish process spec.
About the Company
Company Description
Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.
Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.