asteralabs
Senior Director System Validation Engineer
At a Glance
- Location
- San Jose, California, United States
- Posted
- 2026-02-20T21:02:24-05:00
Key Requirements
Required Skills
Domain Knowledge
- Automation
- Embedded Systems
- Engineering
Requirements
≥15 years' experience supporting or developing complex SoC/silicon products for Server, Storage, Networking applications and high‑performance hardware companies.
≥5 years hands-on experience with Silicon/System bring-up, validation, and debug, including in customer systems.
Deep understanding of CPU, GPU, SoC, or AI/ML accelerator architectures, including memory subsystems, I/O, power management, and firmware interactions.
Expertise in validation methodologies: pre‑silicon simulation/emulation, post‑silicon bring‑up, system validation, stress testing, and performance characterization.
Strong background in debug methodologies, lab infrastructure, and automation frameworks.
Think and act with the customer in mind!
Responsibilities
Seeking a strong technical leader who has delivered multiple SoC products.
Lead and scale the system validation organization for Astera Labs' AI fabric portfolio, building a high-performing team across multiple concurrent product programs.
Understand the performance and functionality requirements of our AI fabric switches to enable customers to develop Data Center systems using Astera Labs' connectivity products for AI and ML applications.
Own comprehensive validation strategies for AI fabric switch products.
Drive execution through scalable automation platforms and data-centric testing with automated reporting and specification compliance verification.
Collaborate cross-functionally with Architecture, Hardware, Firmware, and Software teams to influence product requirements and ensure validation excellence.