asteralabs
Principal Digital Design Engineer (AI Fabric)
At a Glance
- Location
- San Jose, California, United States
- Experience
- 8+ years
- Posted
- 2026-02-23T19:08:15-05:00
Key Requirements
Domain Knowledge
- Automation
- Embedded Systems
- Engineering
Requirements
8+ years of hands-on experience developing complex SoC/silicon products in Server, Storage, and/or Networking markets
Track record of delivering multiple high-performance designs to production in data-center environments
Hands-on collaboration with embedded firmware teams; deep understanding of firmware development challenges and constraints
Familiarity with standard embedded processor subsystems (RISC-V, Arm, etc.)
Proven contributions to design methodology, CAD automation, or design infrastructure to improve productivity or design quality
Responsibilities
Develop and implement complex digital blocks and subsystems by defining micro-architecture and driving digital design.
Collaborate with verification teams to develop test plans, achieve coverage closure, and debug complex issues.
Lead efforts to achieve timing closure and implement Design-for-Test (DFT) features for optimal design performance.
Work closely with post-silicon teams to facilitate silicon bring-up and debug.
Mentor junior engineers to develop their technical skills and expertise.
Actively contribute to the development and improvement of silicon development processes.