asteralabs
Senior Silicon Validation Engineer (DDR Memory)
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At a Glance
- Location
- United States
- Posted
- 2026-02-13T19:51:44-05:00
Key Requirements
Required Skills
Data AnalysisMATLAB
Domain Knowledge
- Embedded Systems
- Engineering
- Regulatory
Requirements
≥3 years' experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.
Think and act with the customer in mind!
Hands-on experience with signal integrity, especially as it relates to multi-rank DDR and DDR termination schemes
Working knowledge of C or C++ for embedded FW
Familiarity with PCIe/CXL compliance standards and ability to drive electrical compliance testing at industry workshops
Experience working with DRAM memory vendors on DDR4 or DDR5 to identify issues and working with internal SoC HW/FW teams to improve memory calibration and tuning sequences