kepler
FPGA Digital Design Engineering Intern (January 2027) (4-16 months)
At a Glance
- Location
- Toronto, Ontario, Canada
- Work Regime
- hybrid
- Employment
- Intern/Co-op
- Experience
- 2+ years
- Compensation
- Hourly Rate Range: $29.75 to $39.00 CAD Actual total compensation
- Department
- Internships & Co-ops
- Posted
- 2026-07-21T18:50:07.209000+00:00
Key Requirements
Required Skills
Domain Knowledge
- Embedded Systems
- Engineering
Requirements
Experience with Verilog, SystemVerilog, or VHDL.
(You will be working in SystemVerilog).
Experience with DSP (digital signal processing) algorithms;
Strong scripting experience (e.g.
bash, Python, Tcl, etc.);
Responsibilities
Maintain and add new functionality to our FPGA code base, including code to control and test our SDR (software-defined radio) and SDN (software-defined network);
Design custom IP for new features of both Kepler's satellites and ground stations;
Add support for new sensors/communication interfaces (such as SPI, I2C, UART);
Work with high-speed FPGA interfaces (e.g.
JESD204b, 10G Ethernet, Aurora).
About the Company
At
Kepler Communications
, we're not just imagining the future of on-demand space connectivity -
we're
leading it!
Our mission is to provide real-time on-orbit connectivity for critical missions, enabling a new era of data-driven intelligence and innovation. With