graphcore

Senior Signal Integrity Engineer

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At a Glance

Location
Austin, Texas, United States
Posted
2026-06-15T11:30:16-04:00

Key Requirements

Required Skills

Data AnalysisMATLABPython

Domain Knowledge

  • Automation
  • Cloud
  • Engineering

Benefits & Perks

Health Insurance

xible working and a comprehensive benefits package designed to support your health

Requirements

for high-speed digital systems.

Hands-on measurement expertise using

VNAs, TDRs, BERTs, and high-speed oscilloscopes

Experience measuring and analyzing

S-parameters, impedance profiles, eye diagrams, jitter, timing margins, insertion loss, return loss, and crosstalk

Knowledge of high-speed interfaces such as

Compensation & Benefits

This is an opportunity to work on complex, high-performance compute platforms while partnering with experienced technical leaders, ODMs, and interconnect vendors. You will play a key role in defining, measuring, validating, and optimizing next-generation system-level I/O performance.

USA Benefits

In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

Responsibilities

Senior Signal Integrity Engineer

to develop, validate, and optimize high-speed signaling solutions across blade- and rack-level architectures for advanced compute platforms.

This role sits at the intersection of

silicon, package, interconnect, board, and system design

, with a strong emphasis on hands-on measurement, simulation correlation, and cross-functional technical communication.

analysis for blade- and rack-level system architectures.