Staff Engineer, High-Speed I/O Analog-Mixed Circuit

5+ years of experience working with system on chip architecture, high-speed serial interfaces, analog and mixed-signal circuit designs using advanced CMOS technology nodes.

Prior experience in design of any one of the standard high speed interfaces like DDR, LPDDR, , GDDR, HBM I/O interface.

Needs to be an expert in providing and understanding layout requirements of high speed circuits.

Knowledge of all facets of high speed I/O design but specifically should include DLL / PLL / FFE / CTLE / DFE, output drivers , ODT, Duty cycle correction (DCC), Training/calibration to improve timing, high speed power design and low power design.

Experience working closely with device/process team to define transistor specs

Experience in high frequency clock distribution design, implementation, and analysis.

Hands on in analog circuit design, which includes circuit design, running simulations to confirm functionality and performance, and work with verification team to verify design.

The mixed-signal designs will include but are not limited to the following: high-speed data converters, PLL, and SERDES.

Guide layout floor-planning block and top level to optimize the overall performance; supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary.

Ownership of circuit and system specifications.

Simulate designs with state-of-the-art CAD tools.

Document designs and simulation results.