asteralabs

Senior Foundry Engineer, Silicon Technology

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At a Glance

Location
San Jose, California, United States
Experience
5+ years
Posted
2026-06-11T18:03:17-04:00

Key Requirements

Domain Knowledge

  • Engineering

Requirements

5+ years of experience in semiconductor device engineering, foundry interface, silicon technology, process integration, yield/process correlation

Experience with advanced FinFET, gate-all-around/nanosheet technologies and BiCMOS technologies

Experience with SRAM, analog/mixed signal, RF, Serdes, low power design constraints

Experience benchmarking foundry nodes using spice models on representative circuits

Experience using foundry models to simulate junction breakdowns, SOA, ESD, aging, reliability or device operating limits

Responsibilities

Senior Foundry Engineer, Silicon Technology

to support foundry engagement, silicon-to-model correlation, tapeout readiness, and yield improvement for advanced semiconductor products.

This person will work closely with internal design, CAD layout, product engineering, test, reliability, operations teams and external foundry partners to identify risks, assess product impact, and drive timely resolution of process, PDK, model, DRC/DFM, and silicon-related issues.

Silicon, process and yield correlation

Analyze process inline data, silicon test data, process drift and process correlation data

Fine tune processes to optimize power, performance and yield