Sr. Engineer, SoC Design Verification – AI/ML Accelerator Chiplets

Proficient in SystemVerilog/UVM, Python, and C/C++, with strong design verification skills.

Experienced in collaborating with cross-functional teams (architecture, software, and IP teams) to develop test plans, infrastructure, and debug tightly coupled hardware/software.

Familiar with and excited by AI-assisted tools like Cursor or Claude Code to enhance productivity.

Hands-on experience with AI accelerator hardware, Network-on-Chip design, and/or embedded FW design is a plus.

Collaborate with architecture, IP, and software teams to develop and execute comprehensive test plans for AI/ML accelerator chiplets.

Design and implement hybrid verification environments , coordinating several embedded firmware threads with traditional testbench components like monitors, transactors, and checkers.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology.  Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2).   These requirements apply to persons located in the U.S. and all countries outside the U.S.  As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency.  If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.